Tools: Learning Open-Source PDKs by Playing With Them

A Practical Guide to Open-Source PDKs 🚶 ## What Is a PDK? ## Where Should You Start Reading a PDK? ## Understanding Skyrockets When You Draw Cells Yourself ## Reading the “Personality” from Device Parameters ## Try Running SPICE Simulations ## If You Want to Build a PDK Yourself ## 1. Layer Definitions (Layer Map) ## 2. Minimal DRC ## 3. LVS ## 4. Simple Standard Cells ## Open-Source PDKs Are Meant to Be Played With ## Things I’ve Tried with Open-Source PDKs ## Building Design Environments with Mini PCs and SSDs ## Playing with SPICE Model Parameters ## Using Libretto for Cell Characterization ## Drawing SRAM Butterfly Curves ## Laying Out SRAM Bitcells ## Running OpenLane with Custom 7-Track Cells ## Playing Deepens Understanding ## Summary ## Related Materials From Standard Cell Layouts to SPICE, SRAM, and P&R Flows If you’ve ever opened a PDK and thought, “Where do I even start?”, you’re not alone. This article is for hobbyists, students, and engineers who want to understand PDKs beyond documentation—by actually touching and experimenting with them. PDKs (Process Design Kits) often look overwhelming at first—huge directories, dense design rules, endless SPICE parameters. They’re usually introduced as something professional, serious, and not meant to be touched casually. But here’s the good news: open-source PDKs don’t have to be scary. In this post, I’ll share how I’ve been learning open-source PDKs by playing with them—looking at layouts, drawing my own cells, running SPICE simulations, breaking things, and sometimes fixing them again. No tape-outs. No deadlines. Just curiosity and experiments. In this article, I share a hands-on, experience-based guide to understanding open-source PDKs (Process Design Kits). This article is written for people who are interested in semiconductor design but feel unsure about where to start: Rather than treating PDKs as something purely professional or intimidating, this guide focuses on learning by experimenting and having fun. A PDK (Process Design Kit) is a collection of everything required for semiconductor design. It typically includes: In the past, IC design could be done with just the so-called “three essentials”: However, as processes became more advanced and EDA tools more complex, things changed. Almost everything related to design and verification became part of the PDK. If you want to understand a PDK, jumping straight into design-rule documents is honestly painful. A much better starting point is to look at standard-cell layouts. From a single standard-cell layout, you can immediately see: Below is an example of a standard-cell layout from SKY130. (Standard cells are essentially compressed collections of minimum rules.) Rather than reading rules, you can often understand them visually just by looking. An even better approach is to draw standard cells yourself. When you do this, you quickly discover: To understand the design philosophy behind a PDK, nothing beats drawing layouts while constantly checking the rules. Next, look at the device parameters. Even just comparing Ion (on-current) and Ioff (off-current) reveals a lot about a process. Typical trends include: From this, you can infer: If device documentation is limited, SPICE simulations can help fill the gaps (though model accuracy should always be considered). Running SPICE simulations reveals device behavior very clearly. You can explore things like: Even if symbols are not provided, handwritten netlists are usually enough to experiment. Once you establish the flow: Read → Draw → Simulate your understanding of the PDK reaches a new level. 🔗 Open-source PDK community https://ishi-kai.org/ With the classic three essentials (device parameters, design rules, and SPICE models), you can build a minimal PDK. The goal is to start small and functional. This step defines the worldview of the PDK. Minimum required layers include: The initial goal is simple: A PDK that design tools can correctly interpret Professional PDK development and open-source PDK exploration are completely different. Tuning SPICE models, characterizing cells with Libretto, designing SRAM bitcells, running OpenLane with 7-track libraries… Through this kind of “play,” you often gain deeper insight than from formal work. Below are some examples of how I’ve been playing with open-source PDKs—not as work, but as exploration. I start from the environment. Using low-cost mini PCs and multiple small SSDs, I prepare: Each PDK lives on its own SSD. This makes it easy to: Supported PDKs include: Portable PDK environment on a mini SSD Next, I tweak SPICE model parameters such as Vth0 and U0. By gradually changing them, I observe: I also tried simple fitting to minimize error between: The goal is not model accuracy, but intuition: How do model parameters affect circuit behavior? I used Libretto, a characterization tool, with: By comparing results, I could clearly see: Seeing characterization results helps bridge SPICE models and circuit-level behavior. 🔗 Libretto https://github.com/snishizawa/libretto Using a 6T SRAM bitcell, I plotted butterfly curves to evaluate SNM (Static Noise Margin). I could visually understand SRAM stability much better. I also laid out SRAM bitcells: Comparing them reveals differences in: Doing both circuit and layout work connects understanding in a powerful way. Finally, I prepared a full digital flow using custom 7-track standard cells: Running the OpenLane flow answers key questions: The key is not stopping at cell creation, but running the full flow. None of these experiments are: But in an environment where you can: your understanding of PDKs deepens naturally. Open-source PDKs are, in my opinion, excellent learning and experimentation platforms. If you’re curious about semiconductor design, don’t wait for permission—open a PDK, draw something small, and start playing. Open-source PDKs are a gateway to making semiconductor design accessible and enjoyable for everyone. 📅 December 2025 Event: Open PDK Seminar by Tokai Rika Shuttle https://ishi-kai.org/information/seminar/2025/10/30/DecEvent_1213.html 📄 Presentation slides (PDF): A Practical Guide to Open-Source PDKs https://ishi-kai.org/assets/presentation/event/202512/Guide2OpenSourcePDKs.pdf 🇯🇵 Japanese version of this article (Qiita): https://qiita.com/take_hoojoo/items/8840528d3e26b31d18bb Templates let you quickly answer FAQs or store snippets for re-use. Are you sure you want to hide this comment? It will become hidden in your post, but will still be visible via the comment's permalink. Hide child comments as well For further actions, you may consider blocking this person and/or reporting abuse - What a PDK actually is - How to read and explore an open-source PDK - Practical examples using standard cells, SPICE, SRAM, and P&R flows - How to learn PDKs by playing with them - What exactly is a PDK? - How should I approach an open-source PDK? - What should I try first to really understand it? - Transistor models (SPICE) - Device parameters - Design rules - DRC / LVS / ERC rules - Parasitic extraction rules (LPE / PEX) - Standard cell libraries - Configuration for place-and-route (P&R) flows - Device parameters - Design rules - SPICE models - Verification complexity - Number of layers and device types - Mask costs and respin risks - Layer stack and structure - Minimum rules (width, spacing, enclosure) - Metal pitch and routing directions - Poly width and pitch - Well structures and isolation strategies - Try shrinking an 8-track cell into a 7-track cell - Which rules actually matter - The real limits of poly, active, and contacts - Non-negotiable routing constraints - The unique “personality” of each PDK - FF corner: fast but leaky - SS corner: slow but low leakage - Speed vs. leakage trade-offs - Delay and power tendencies - Threshold-voltage variation windows - I–V characteristics - Standard-cell delay (Tpd) - Power vs. speed trade-offs - Layer names, numbers, colors, GDS mappings - Mapping between design and mask layers - N-well / P-well - N+/P+ source-drain - Metal / Via - Width, spacing, enclosure rules - Enough to draw INV / NAND gates - MOS extraction (W/L) - Connectivity extraction - Consistency with SPICE models - INV / NAND for rule validation - DFF to confirm practical usability - Mini PC (CHUWI LarkBox X 2023) - Linux (Linux Mint 21.3 “Virginia”) - Various EDA tools - Multiple open-source PDKs - Break environments without worry - Carry setups between machines - Maintain clean, PDK-specific systems - Changes in Id–Vg curves - Differences from virtual measurement data - Synthetic measurement data - SPICE simulation results - Original models - Self-adjusted models - Delay trends - Slope dependencies - Where model differences appear - SPICE models - Transistor sizing - Conventional vertical cells - Point-symmetric cells - Routing efficiency - Scalability potential - Liberty (.lib) - Does P&R actually succeed? - Where are routing density limits? - How compatible are these cells with existing libraries? - Required for professional work - Particularly efficient - Break things - Laugh at failures - Playing with open-source PDKs leads to deeper understanding - Breaking and fixing things yourself is the best teacher